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| Datasheet File OCR Text: |
| white electronic designs !""##$% &' ( ! !"# $ % &" ! " $ $ % &" ! " $ ' (#( #)*+, ,-. /0- "#(! 1"( # " " #" 2 " 3"4 "4 ""4 5%6 "3! 7 1#( 1/ #"4# !"# ! " # !" #" $4 8, 9:;0#/0<% 4 ! # # =% 4 ! " !" >#"4 <% ) ">=% # !" !"# #" !3. " " /$4 1# #( # = 3 )*/ $4 8, 9:;0 1# "" !"# 2 "4 $ % &" ! " $ "4 $ ' $4 4 ! # # # 1#3 >#"4 2 1 >#( "4 ! " 1 2" %" 2 "4 #" 2 "/ $4 # 1#3 # 2 >#("4 ! " 1 2" %" 2 "4 #" 2 "/ $4 8, 9:;0 # 1#3 # 3"4 # # !" # " "! ( / ! ""#$%%&'% ()(&'% &*+ , & ""#$%%&)()'%&+-)#+* &#.)$&-(/*$ ! &!')0')&-(/*$ &*+ , &+1& ""#$%%&)#+/$ &+*'2-& ""#$%%&)#+/$ &#.)$&-(/*$ & ""#$%% 3(')+&0#$ 4(#5$ &6)$&#.)$&-(/*$% & &37 4.0& -(/*$& & $8. $ 4.0& -(/*$& & $8. $ +1$#&'00*6&0.-%9&: ()(&'%& +1$#&'00*6&0.-%9 : &;: &<')'#$= #+'-" +& +-)( ) ) "*+! white electronic designs dq 8-15 dq 0-7 dq 9-16 dq 1-8 dq 8-15 dq 0-7 a 0-17 dq 8-15 dq 0-7 a 0 a 1 a 2 a 3 a 4 a 5 a 6 a 7 a 8 a 9 a 10 a 11 a 12 a 13 a 14 a 15 a 16 bwe bw 1 bw 2 bw 3 bw 4 ce 2 oe adsc clk dq 0-31 a 0 a 1 dq 24-31 dq 16-23 dq 25-32 dq 17-24 a 0 a 1 a 2 a 3 a 4 a 5 a 6 a 7 a 8 a 9 a 11 a 10 /ap ba 0 ba 1 ldqm udqm cs ras cas we clk a 0 a 1 a 2 a 3 a 4 a 5 a 6 a 7 a 8 a 9 a 11 a 10 /ap ba 0 ba 1 ldqm udqm cs ras cas we clk a 12 a 13 a 12 a 13 dq 8-15 dq 0-7 dq 24-31 dq 16-23 sswe bwe 0 bwe 1 bwe 2 bwe 3 ssce ssoe ssadc ssclk sda 10 sdce sdras sdcas sdwe sdclk white electronic designs & > -0') '*%$ +%.).8$&"5$ 4$&%6%)$2& *+ ,&.-0'):& **&+<&)4$& &.-0')%&(#$&%(20*$"&+-&)4$&#.%.-5&$"5$&+<&)4$& *+ ,: 4$-&%(20*$"&()&)4$&0+%.).8$&#.%.-5&$"5$&+<&)4$& *+ ,9& 9&!9&(-"&&"$<.-$ ! >-0') '*%$ ).8$&+1 )4$&+0$#().+-&)+&/$&$?$ ')$"&/6&)4$& : > -0') '*%$ ).8$&+1 &".%(/*$&+#&$-(/*$& &"$8. $&+0$#().+-: > -0') '*%$ +%.).8$&"5$ 4$&%6%)$2& *+ ,&. -0'):& **&+<&)4$& &.-0')%&(#$&%(20*$"&+-&)4$&#.%.-5&$"5$&+<&)4$& *+ ,: > -0') '*%$ ).8$&+1 &".%(/*$&+#&$-(/*$&"$8. $&+0$#().+-&/6&2(%,.-5&+#&$-(/*.-5&(**&.-0')%&$? $0)& &(-"& : 4$-&%(20*$"&()&)4$&0+%.).8$&#.%.-5&$"5$&+<&)4$& *+ ,9& 9& 9&(-"& &"$<.-$ >-0') '*%$ ).8$&+1 )4$&+0$#().+-&)+&/$&$?$ ')$"&/6&)4$& : ""#$%%&/'%&<+#& &(-"& &(-"& &(#$&)4$&/'#%)&(""#$%%&.-0')%&<+#&)4$& '#.-5&(&(-,& ).8$& +22(-"& 6 *$9& 9& &"$<.-$%&)4$&#+1&(""#$%%&; = 14$-&%(20*$"&()&)4$&#.%.-5& *+ ,&$"5$: '#.-5&(&$("&+#&#.)$& +22(-"& 6 *$9& &"$<.-$%&)4$& +*'2-&(""#$%%&; =&14$- 9 >-0') $8$* @ %(20*$"&()&)4$&#.%.-5& *+ ,&$"5$:&>-&("".).+-&)+&)4$&#+1&(""#$%%9& &.%&'%$"&)+&.-8+,$ 3 ')+0#$ 4(#5$&+0$#().+-&()&)4$&$-"&+<&)4$&'#%)&$("&+#&#.)$&6 *$:&><& &.%&4.549 (')+0#$ 4(#5$&.%&%$*$ )$"&(-"& &(-"& &"$<.-$&)4$&/(-,&)+&/$&0#$ 4(#5$":&><& &.% *+19&(')+0#$ 4(#5$&.%&".%(/*$": '#.-5&(& #$ 4(#5$& +22(-"& 6 *$9& &.%&'%$"&.-& +-a'- ).+-&1.)4& &(-"& &)+ +-)#+*&14. 4&/(-,;%=&)+&0#$ 4(#5$:&><& &.%&4.549&(**&/(-,%&1.**&/$&0#$ 4(#5$"&#$5(#"*$%% +<&)4$&%)()$&+<& &(-"& :&><& &.%&*+19&)4$-& &(-"& &(#$&'%$"&)+&"$<.-$&14. 4 /(-,&)+&0#$ 4(#5$: >-0') $8$* @ ()(&>-0' )!')0')&(#$&2'*).0*$?$"&+-&)4$&%(2$&0.-%: !')0') &0$#<+#2&)4$&/6)$&1#.)$&$-(/*$&<'- ).+-&<+#&)4$& &(-"& &<'- ).+-&<+#&)4$ >-0') '*%$ :& &.%&(%%+ .()$"&1.)4& 9& &1.)4& 9& &1.)4& &(-"& 1.)4& : 9& '00*6 +1$#&(-"&5#+'-"&<+#&)4$&.-0')&/'<<$#%&(-"&)4$& +#$&*+5. : '00*6 ()(& /(%$&0+1$#&%'00*6&0.-%9&: &;: &<')'#$=: ) "*+! white electronic designs ! +*)(5$&+-& &$*().8$&)+& 73: &)+&b: .-&; ?= 73: &)+& &b3: )+#(5$& $20$#()'#$&; = &7c&)+&bc '- ).+-& $20$#()'#$ b3c 4+#)&.# '.)&!')0')&'##$-) 33&2 "" ! " # $ '00*6& +*)(5$&;= : : >-0')&.54& +*)(5$&;9= :3 &b3: >-0')&+1& +*)(5$&;9= 73: 3: >-0')&$(,(5$&'##$-) > 73 3 d 3& & & & !')0')&$(,(5$&;!')0')& .%(/*$"= > 73 3 d 3& & & & &!')0')&.54&;> &e&72 =&;= : @ &!')0')&+1&;> &e&2 =&;= @3: &!')0')&.54&;> &e&72 = : @ &!')0')&+1&;> &e&2 = @3: ! " # $ %& '( ) ! "$ *+ ,$ -) . "$ /) ,$ -) % "$ &$ ' # $ f 33 +1$#&'00*6&'##$-)g 3 f 33 3 !0$#().-5&;99= & ).8$&& & ')+&$<#$%4 > f 3 33 2 33 f 33 33 f +1$#&'00*6&'##$-) 3 f 3 3 !0$#().-5&;99= & ).8$&& &>"*$ > f 33 2 33 f 3 +1$#&'00*6&'##$-) f 33 & ).8$&& &>"*$ > 33 f 33 3 2 !0$#().-5&;99= f 3 33 &(-"& & & &73: 9 !&)(-"/6 **&+)4$#&.-0')%&()& &b3:& & &+# > 3:3 3:3 2 & & &73: 9&*,&<#$h'$- 6&e&3 &(-"& & & &2.- &)(-"/6 **&+)4$#&.-0')%&()& &2(?& & &+# > 3:3 :3 2 & & &73: 9&*,&<#$h'$- 6&e&3 ')+& $<#$%4 > 3 33 2 ! " # 0 % ( 1 0 % ( 1 ) ' %2 3$ (2 4 5 1 6 6 6$7)892 0 % ( 5 "$ &$ # $ ""#$%%&>-0')&(0( .)(- $&;= &e&ci&<&e& f 0 >-0')!')0')&(0( .)(- $&; =&;= &e&ci&<&e& f 30 +-)#+*&>-0')&(0( .)(- $&;= &e&ci&<&e& f 0 *+ ,&>-0')&(0( .)(- $&;= &e&ci&<&e& f 0 ! " # white electronic designs % (((((((((((( )** %+ ((((((((((( ,-- %+ (((((((((( ,.* %+ ((((((((((( ,// %+ # # # # $ *+ ,& 6 *$& .2$ ) -% *+ ,&>& .2$ ) : : : : -% *+ ,&!& .2$ ) : : : : -% *+ ,&)+&+')0')&8(*." ) : : : :3 -% *+ ,& )+& +')0')& .-8(*." ) : : : : -% *+ ,&)+&+')0')&+-&+17j ) 3333-% *+ ,&)+&+')0')&.-&.547j ) : : : : : : :3 -% !')0')&-(/*$&)+&+')0')&8(*." ) : : : :3 -% !')0')&-(/*$&)+&+')0')&.-&+17j ) 3333-% !')0')&-(/*$&)+&+')0')&.-&.547j ) :3 : : : -% ""#$%%9&+-)#+*9& ()(7.-&$)'0& .2$&)+&*+ , ) : : : : -% ""#$%%9&+-)#+*9& ()(7.-&+*"& .2$&)+&*+ , ) 3: 3: 3: 3: -% ) "*+! white electronic designs % &&$$( $& " "0 $%$*$ )$"&6 *$9& +1$#& +1- +-$ k k .547j > & 6 *$9& $5.-& '#%) ?)$#-(* k & 6 *$9& $5.-& '#%) ?)$#-(* & 6 *$9& $5.-& '#%) ?)$#-(* .547j & 6 *$9& '%0$-"& '#%) '##$-) k & 6 *$9& '%0$-"& '#%) '##$-) k .547j & 6 *$9& '%0$-"& '#%) '##$-) & 6 *$9& '%0$-"& '#%) '##$-) .547j > &6 *$9&'%0$-"&'#%) '##$-) k k > &6 *$9&'%0$-"&'#%) '##$-) k ! " # : ; < =7> >0&> ? ?!@ ) ! %?!@ >0&>( 2?a 6 1 b c 1 1 7! >0&> 5 > /d ! >0&> 8 1 1 > /d 1/ % kkkk > &+-$&6)$&; = > &(**&6)$% white electronic designs ssclk sswe t khk l t kl k h t khk h ssce ssads t s t s t s t h t h dq t khqx t kqlz q(a1 ) q(a2 )q(a3 )q(a4 ) t khqv q(a5 ) a5 addr t h a1 a2 a3 a4 ssoe t oelq v t oehz t khk l t kl k h t khk h t khg w x t must be high t h t s d ( a1 ) d ( a2 ) d ( a3 ) d ( a4 ) d ( a5 ) t s t h t h t h t s t h t oehz a1 a2 a3 a4 a5 s h ssclk sswe ssce ssads dq addr ssoe ) "*+! white electronic designs % % " ! " " ((((((((((( ,). %+ ((((((((((((( ,** %+ ((((((((((((( 1/ %+ # # # $ *+ ,&6 *$& .2$&;= &e& ) 333 3 333 333 -% &e& ) 3 333 333 333 *+ ,&)+&8(*."&!')0')&"$*(6&;9= ) -% !')0')& ()(&+*"& .2$&;= ) -% *+ ,&>& '*%$&.")4&;= ) -% *+ ,&!& '*%$&.")4&;= ) -% >-0')&$)'0& .2$&;= ) -% >-0')&+*"& .2$&;= ) -% &)+&!')0')&+17j&;= ) -% &)+&!')0')&.547j ) -% +1& ).8$&)+&+1& ).8$& $*(6&;= ) 3 3 -% l&)+& l& $*(6&;= ) 3 3 -% +1& #$ 4(#5$& .2$&;= ) 3 3 -% +1& ).8$& .2$&;= ) 3 39333 3 39333 3 39333 -% +1&6 *$& .2$&7&!0$#().+-&;= ) 3 3 3 -% +1&6 *$& .2$&7& ')+&$<#$%4&;9= ) 3 3 3 -% (%)& ()(&.-&)+&$1&+*'2-& ""#$%%& $*(6&;= ) (%)& ()(&.-&)+&+1& #$ 4(#5$&;= ) (%)& ()(&.-&)+&'#%)&)+0&;= ) +*'2-& ""#$%%&)+&+*'2-& ""#$%%& $*(6&;= ) : : : '2/$#&+<& (*."&!')0')& ()(&;= $( ! " # e 2 ) 0 4 # % -)/, 8( 6 3# 0 # f% 3 (-)g/# b 4 5 5 4 8 5 1 + 1 h 0 1 7 i 1 / white electronic designs ' 2*$ .*$ )*$ )*$ )*$ ,*$ ,*$ ,*$ f&;:3-%= 33 f&;3:3-%= f&;:3-%= 3 0 4 " # 4 $ % 5 & 3 " ' 2*$ .*$ )*$ )*$ )*$ ,*$ ,*$ ,*$ 33 f&;:3-%= f&;:3-%= 3 0 4 " # 4 % 5 & 3 " ((((((((((((((((((((( 6,* ((((((((((((((((((((( 6,) # # $ $<#$%4& $#.+"&;9= ) @@ 2% % 4 ! " # b,j+ ) e 7 1 %2k( 1 4/ " % &&&&&&&&&&&&&&&&&&&& " " " " 7( " $ +"$&$5.%)$#&$) k &&&&&&&&&&&&&&&&&&! &! ')+&$<#$%4&;= & & k k k #$ 4(#5$ .-5*$&(-, k #$ 4(#5$&(**&(-,% k k (-,& ).8()$ k +1& ""#$%% #.)$ k #.)$&1.)4& ')+& #$ 4(#5$ k $(" k $("&1.)4& ')+& #$ 4(#5$ k '#%)& $#2.-().+- k k k +&!0$#().+- k k k $8. $& $%$*$ ) k k k k k k ()(&#.)$!')0')& .%(/*$ k k k k k k ()(& (%,!')0')& .%(/*$ k k k k k k ! " # ' '2 l7'@ l7'l7'2l7 k@ 4 ) k 4 %k(7 %k ( %k ( 1 4 6 ' k@ m 4 7 k 5 2 b k@ 1 'n @ ' 71 k@ 4 1 4 k@ 4 @ @ 7 @ 4 %m 4 ( ) "*+! white electronic designs m3 = 0 1 2 4 8 reserved reserved reserved full page m3 = 1 1 2 4 8 reserved reserved reserved reserved operating mode standard operation all other states reserved 0 - 0 - defined - 0 1 burst type sequential interleaved cas latency reserved reserved 2 3 reserved reserved reserved reserved burst length m0 0 1 0 1 0 1 0 1 burst length cas latency bt a 9 a 7 a 6 a 5 a 4 a 3 a 8 a 2 a 1 a 0 mode register (mx) address bus m1 0 0 1 1 0 0 1 1 m2 0 0 0 0 1 1 1 1 m3 m4 0 1 0 1 0 1 0 1 m5 0 0 1 1 0 0 1 1 m6 0 0 0 0 1 1 1 1 m6-m0 m8 m7 op mode a 10 a 11 reserved* wb 0 1 write burst mode programmed burst length single location access m9 *should program m11, m10 = "0, 0" to ensure compatibility with future devices. white electronic designs ! " #$% , , , ,&- + $ . .+ $ , , , / 0 0 !" .1$1 . !" , , / , 0 0 - 2 & , , / / 3! $ ! 3 4! % ! % 1 ) 4 5 , / , , 3! " 6 - 5,,7!, # , / , / 3! " $ 6 - 5,,7!, , / / , 0 0 3" 8 2 & , / / / 0 0 2 & 2 & / 0 0 0 0 0 % 2 & , , , ,&- + $ . 5,,7!, , , , / 0 0 !" .1$1 5,,7!, , , / , 0 0 - - , , / / 3! $ ! 3 4! % 5,,7!, $ ! % , / , , 3! " . 9 1!" - (* , / , / 3! " $ . $ 9 1!" - (* , / / , 0 0 3" 8 2 & , / / / 0 0 2 & 2 & /000 0 0 % 2 & , , , ,&- + $ . 5,,7!, , , , / 0 0 !" .1$1 5,,7!, , , / , 0 0 - 8 3" 9. - , , / / 3! $ ! 3 4! % 5,,7!, # $ , / , , 3! " 8 3" 9. : * , / , / 3! " $ 8 3" 9. $ : * , / / , 0 0 3" 8 8 3" , / / / 0 0 2 & "3" /000 0 0 % "3" , , , ,&- + $ . 5,,7!, , , , / 0 0 !" .1$1 5,,7!, , , / , 0 0 - 8 3" 9. - , , / / 3! $ ! 3 4! % 5,,7!, # , / , , 3! " 8 3" 9. : * , / , / 3! " $ 8 3" 9. $ : * , / / , 0 0 3" 8 8 3" , / / / 0 0 2 & "3" / 0 0 0 0 0 % "3" , , , ,&- + $ . 5,,7!, , , , / 0 0 !" .1$1 5,,7!, , , / , 0 0 - 5,,7!, # $ , , / / 3! $ ! 3 4! % 5,,7!, # !" - , / , , 3! " 5,,7!, ,/,/ 3! " $ 5,,7!, , / / , 0 0 3" 8 5,,7!, , / / / 0 0 2 & "3" /000 0 0 % "3" % ) "*+! white electronic designs % " ! " #$% , , , ,&- + $ . 5,,7!, , , , / 0 0 !" .1$1 5,,7!, , , / , 0 0 - 5,,7!, # , , / / 3! $ ! 3 4! % 5,,7!, # !" - , / , , 3! " 5,,7!, ,/,/ 3! " $ 5,,7!, , / / , 0 0 3" 8 5,,7!, , / / / 0 0 2 & "3" /000 0 0 % "3" , , , ,&- + $ . 5,,7!, , , , / 0 0 !" .1$1 5,,7!, , , / , 0 0 - 2 & 93 4 1 , , / / 3! $ ! 3 4! % 5,,7!, # - , / , , 3! " 6 - 5,,7!, # , / , / 3! " $ 6 - 5,,7!, # , / / , 0 0 3" 8 2 & 93 4 1 , / / / 0 0 2 & 2 & 93 4 1 / 0 0 0 0 0 % 2 & 93 4 1 , , , ,&- + $ . 5,,7!, , , , / 0 0 !" .1$1 5,,7!, , , / , 0 0 - 5,,7!, # , , / / 3! $ ! 3 4! % 5,,7!, # $ ! % , / , , 3! " 5,,7!, # ,/,/ 3! " $ 5,,7!, # , / / , 0 0 3" 8 2 & 9$ %1 , / / / 0 0 2 & 2 & 9$ %1 /000 0 0 % 2 & 9$ %1 , , , ,&- + $ . 5,,7!, , , , / 0 0 !" .1$1 5,,7!, , , / , 0 0 - 5,,7!, # , , / / 3! $ ! 3 4! % 5,,7!, # $ % , / , , 3! " . 9 1!" - , / , / 3! " $ . $ 9 1!" - , / / , 0 0 3" 8 2 & 9$ %1 , / / / 0 0 2 & 2 & 9$ %1 / 0 0 0 0 0 % 2 & 9$ %1 , , , ,&- + $ . 5,,7!, , , , / 0 0 !" .1$1 5,,7!, , , / , 0 0 - 5,,7!, # $ % , , / / 3! $ ! 3 4! % 5,,7!, # !" , / , , 3! " 5,,7!, #* - , / , / 3! " $ 5,,7!, #* , / / , 0 0 3" 8 2 & 9- 1 , / / / 0 0 2 & 2 & 9- 1 /000 0 0 % 2 & 9- 1 white electronic designs % " ! " #$% , , , ,&- + $ . 5,,7!, , , , / 0 0 !" .1$1 5,,7!, , , / , 0 0 - 5,,7!, , , / / 3! $ ! 3 4! % 5,,7!, $1 , / , , 3! " 5,,7!, ,/,/ 3! " $ 5,,7!, , / / , 0 0 3" 8 2 & 95 1 , / / / 0 0 2 & 2 & 95 1 /000 0 0 % 2 & 95 1 , , , ,&- + $ . 5,,7!, , , , / 0 0 !" .1$1 5,,7!, , , / , 0 0 - 5,,7!, + $ , , / / 3! $ ! 3 4! % 5,,7!, ! , / , , 3! " 5,,7!, ,/,/ 3! " $ 5,,7!, , / / , 0 0 3" 8 5,,7!, , / / / 0 0 2 & 2 & 95 1 4 : /000 0 0 % 2 & 95 1 4 : ! " # k k 4 1 ) 2 47 k 4 0 k 4 2 4 6 % ( b 2' % ( 8 ' e + 7 7 - 1 5 4 4 % ( ) "*+! white electronic designs ! " 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 sdclk sdce sdras sdcas addr ba 0, 1 [a 12 ,a 13 ] sda 10 dq sdwe bwe t cc t ch t cl t rcd t ras t ss t sh t rcd t ss t sh t ss t sh t ss t sh t ss t sh t ccd t rp t rac t sac t slz t oh t ss t ss t ss t sh t sh t sh ra ca cb cc rb bs bs bs bs bs bs ra rb qa db qc row active read write read precharge row active don?t care white electronic designs # $ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 sdclk sdce sdras sdcas addr ba 0,1 [a 12 ,a 13 ] sda 10 dq sdwe bwe t rp high-z precharge (all banks) auto refresh auto refresh mode register set don?t care key raa high level is necessary raa t rfc t rfc row active (a-bank) ) "*+! white electronic designs %& " 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 sdclk sdce sdras sdwe addr ra ca0 cb0 cl=2 cl=3 t rac note 3 t rac note 3 t sac t sac t shz note 4 t shz note 4 qa0 qa1 qa2 ba 0, 1 [a 12 ,a 13 ] sda 10 ra rb bwe row active (a-bank) read (a-bank) precharge (a-bank) row active (a-bank) write (a-bank) precharge (a-bank) don?t care sdcas rb dq t oh t oh qa3 db0 db1 db2 db3 qa0 qa1 qa2 qa3 db0 db1 db2 db3 t rdl t rdl t rc t rcd note 1 ! " # 1 5 ' ) 1 %2? /#( 1 ? 1 >/d% ( 4 6 1 % *2? /#(* b !1 >/d %#7)7b7ioc ( white electronic designs ' & " 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 sdclk sdras sdwe bwe sdcas addr ra ca0 cb0 cd0 cc0 ba 0, 1 [a 12 ,a 13 ] sda 10 ra cl=2 qa0 qa1 qb0 qb1 qb2 dd0 dc0 dc1 dd1 t rdl cl=3 dq qa0 qa1 qa2 qa3 dd0 dc0 dc1 dd1 t cdl row active (a-bank) read (a-bank) read (a-bank) write (a-bank) write (a-bank) precharge (a-bank) don?t care t rcd sdce note 2 note 3 note 1 ! " # 1 k@ 1 ) 1 1 1 ? 7 1 1 1 6 k@ 4 1 0 1 1 4 ) "*+! white electronic designs ( " 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 sdclk sdwe sdcas addr raa rbb caa cbb cae cbd cac ba 0, 1 [a 12 ,a 13 ] sda 10 raa rbb cl=2 qaa1 qaa0 qaa2 qaa3 qbb0 qbb1 qbb2 qac1 qbb3 qac0 qbd0 qbd1 qae0 qae1 cl=3 dq qaa1 qaa0 qaa2 qaa3 qbb0 qbb1 qac0 qbb2 qbb3 qac1 qbd0 qbd1 qae0 qae1 row active (a-bank) row active (b-bank) read (a-bank) read (b-bank) read (a-bank) read (b-bank) read (a-bank) precharge (a-bank) don?t care sdce sdras bwe note 2 note 1 ! " # '2 ; < =1 '7'2 '@ 4 ) 1 7 4 white electronic designs ) " 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 sdclk note 2 sdce sdras sdcas addr raa caa rbb cbb cac cbb ba 0, 1 [a 12 ,a 13 ] sda 10 raa rbb dq daa0 daa1 daa2 daa3 dbb0 dbb1 dbb2 dbb3 dbd0 dac0 dac1 dbd1 t rdl t cdl sdwe bwe row active (a-bank) row active (a-bank) write (a-bank) write (b-bank) write (a-bank) write (b-bank) precharge (both banks) don?t care note 1 ! " # 1 1 7k @ 4 ) 1 7 4 ) "*+! white electronic designs & " 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 sdclk sdras sdwe sdcas addr raa caa rbb cbb rac cac ba 0, 1 [a 12 ,a 13 ] cl=2 qaa1 qaa0 qaa2 qaa3 dbb2 dbb0 dbb1 dbb3 note 1 qac0 qac1 qac2 qaa0 qaa3 qaa1 qaa2 dbb2 dbb0 dbb1 dbb3 qac0 qac1 t cdl cl=3 dq row active (a-bank) read (a-bank) row active (a-bank) precharge (a-bank) write (b-bank) row active (a-bank) read (a-bank) don?t care sdce bwe sda 10 raa rbb rac ! " # 1 white electronic designs & " " " 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 sdclk cl=2 qa1 qa0 qa2 qa3 db2 db0 db1 db3 qa0 qa3 qa1 qa2 db2 db0 db1 db3 cl=3 dq row active (a-bank) row active (b-bank) read with auto precharge (a-bank) auto precharge start point (a-bank) write with auto precharge (b-bank) auto precharge start point (b-bank) don?t care sdce sdras sdcas addr ra rb ca cb ba 0, 1 [a 12 ,a 13 ] sdwe sda 10 ra rb bwe ! " # %0 k? 3#o) k@ ( ) "*+! white electronic designs " & " 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 sdclk sdras sdcas addr raa caa cab ba 0, 1 [a 12 ,a 13 ] sda 10 raa cl=2 qaa0 qaa1 qaa2 qaa3 note 2 1 qaa4 qab1 qab0 qab2 qab3 qab4 qab5 cl=3 dq qaa0 qaa1 qaa2 qaa3 qaa4 qab0 qab1 qab2 qab3 qab4 qab5 row active (a-bank) read (a-bank) burst stop read (a-bank) precharge (a-bank) don?t care sdce sdwe bwe 1 2 2 ! " # 7 ) 'n 7 ' k #7) k 17 ' ; c 1 = 6 k white electronic designs " & " 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 sdclk row active (a-bank) write (a-bank) burst stop write (a-bank) precharge (a-bank) don?t care sdce sdwe sdras sdcas addr raa caa cab ba 0, 1 [a 12 ,a 13 ] sda 10 raa dq daa2 daa1 daa0 daa3 daa4 t bdl dab3 dab0 dab1 dab2 dab4 dab5 bwe t rdl note 2 ! " # 7 ) ' / 1 0 2 k@ 1 1 k@ 4 1 0 1 1 4 6 k ) "*+! white electronic designs " 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 sdclk sdce sdras sdcas addr raa caa rbb rbb cab cad cbc ba 0, 1 [a 12 ,a 13 ] cl=2 qab0 daa0 daa0 qab1 qad0 dbc0 qad1 qaa1 qab1 dbc0 qad1 qad0 cl=3 dq row active (a-bank) row active (b-bank) write (a-bank) read with auto precharge (a-bank) row active (a-bank) read (a-bank) write with auto precharge (b-bank) precharge (both banks) sda 10 raa rbb sdwe bwe don?t care rac rac ! " # k@ j;> = % ( k@ 7 @ ;#= ) @ k@1 1 74 / 7 k@1 7 white electronic designs # " sdras sdcas addr bwe sdclk sdce ra key dq new command new command auto refresh mrs sdwe don't care t rfc hi-z hi-z note 2 note 1 note 3 high 0123456780123456789 10 k 4 ! " !' &0 2p2? # '2 7'7'2o'@ 4 1 41 ) ) 4 1' 6 e ) "*+! white electronic designs * %+( , # 3.50 (0.138) max 1.27 (0.050) typ a b c d e f g h j k l m n p r t u 14.00 (0.551) bsc pin 1 index 22.00 (0.866) bsc ???0 '0 0! 0??0 'e > 02??p0 0 2> ! " k k& 4 bi, e 4 " ! ! " ! " " ( ( $$ " ( $$ 3 33 f f 33 33 f 33 f f f 3 f 33 f 3 f f 3 3 f 33 f f f 3 f 33 f ( ( $$ " ( $$ 3> 33 f f 33> 33 f 33 f > f f 3> f 33 f > 3 f f 3> 3 f 33 f > f f 3> f 33 f white electronic designs "+ ) #- "" ( #'#. #-/- a 0 a 1 a 2 a 3 a 4 a 5 a 6 a 7 a 8 a 9 a 10 a 11 a 12 a 13 a 14 a 15 a 16 sswe\ ssce\ ssoe\ ssadc\ ssclk bwe 0 \ bwe 1 \ bwe 2 \ bwe 3 \ sda 10 sdce\ sdras\ sdcas\ sdwe\ sdclk sswe\ ce 2 \ ssoe\ ssads\ ssclk be 0 \ be 1 \ be 2 \ be 3 \ sda 10 ce 0 \ sdras\ sdcas\ sdwe\ sdclk dq 0-7 dq 8-15 dq 16-23 dq 24-31 address bus ea 2-21 data bus ed 0-31 texas instruments tms320c6x dsp edi9lc644v 128k x 32 ssram 1m x 32 sdram ssram control sdram control shared controls ea 2 ea 3 |
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